For digital applications, in particular, for technological nodes beyond the 22 nm node, materials with enhanced charge carrier mobility are sought.
Among these materials, FDSOI (acronym for fully depleted silicon-on-insulator) substrates feature a very thin (i.e., typically less than 50 nm thick) layer of silicon on a buried electrically insulating layer, the silicon layer potentially being used to form the channel of a CMOS transistor.
Strained silicon-on-insulator (sSOI) has been identified as a solution allowing the mobility of charge carriers in the silicon layer to be enhanced and good performance thereof has been demonstrated.
Various fabrication methods are known.
Document US 2014/0225160 discloses, in particular, a method allowing at least part of a strain present in a silicon-germanium layer located on the surface of a receiving substrate to be transferred to an initially relaxed silicon layer bonded to the receiving substrate via a dielectric layer that is intended to form the buried insulating layer of the SOI. This strain transfer occurs when a portion of the stack is cut by means of trenches that extend into the receiving substrate at least beyond the strained silicon-germanium layer. Thus, a relaxation of the compressive strain of the silicon-germanium layer is at least partially transmitted in the form of a tensile strain of the silicon layer.
Based on this principle, an sSOI substrate can be manufactured according to the following steps:                a donor substrate 1 comprising a monocrystalline carrier substrate 10 covered by a silicon oxide or dielectric layer 11 is provided (cf. FIG. 1A);        ionic species are implanted into the donor substrate 1 so as to form a weakened zone 12 allowing a monocrystalline semiconductor layer 13 to be transferred to be defined (cf. FIG. 1B);        a receiving substrate 2 comprising a surface layer 20 of silicon-germanium under compressive strain is provided (cf. FIG. 1C);        the donor substrate 1 is bonded to the receiving substrate 2, the silicon oxide (or dielectric) layer 11 which is intended to form the buried insulating layer of the sSOI substrate and the strained silicon-germanium layer 20 being at the bonding interface (cf. FIG. 1D);        the monocrystalline silicon layer 13 is transferred to the receiving substrate 2 by detaching the donor substrate along the weakened zone (cf. FIG. 1E);        trenches T are formed around a portion of the stack consisting of the strained silicon-germanium layer 20, the buried oxide (or dielectric) layer 11 and the transferred monocrystalline semiconductor layer 13, the trenches extending into the receiving substrate 2 beyond the strained silicon-germanium layer 20 (cf. FIG. 1F).        
The cutting operation results in the at least partial relaxation of the silicon-germanium and the transmission of at least part of the strain to the transferred silicon layer in the portion, thus allowing the strained semiconductor-on-insulator substrate, denoted by sSOI, to be formed.
For applications beyond the 22 nm technological node, the thickness of the buried dielectric layer should be less than or equal to 25 nm.
For such a low thickness of the dielectric layer, the final defectivity of the sSOI substrate heavily depends on the bonding conditions and, in particular, on the materials present at the bonding interface.
However, although surface preparation treatments that are conventionally used in the field of semiconductors are applied to the silicon-germanium layer, a substantial degree of defectivity of the sSOI substrate is still observed.